The present invention relates to a tantalum sputtering target suitable for forming a barrier seed layer in a wiring of a semiconductor integrated circuit, and particularly relates to a tantalum sputtering target capable of realizing favorable thickness uniformity even under high-power sputtering conditions by moderately reducing the sputter rate (deposition rate), and a method for producing such a tantalum sputtering target.
The sputtering method for forming films from metals, ceramics and other materials has been used in numerous fields such as electronics, corrosion resistant materials and ornaments, catalysts, as well as in the manufacture of cutting/polishing materials and abrasion resistant materials. The sputtering method itself is a well-known method in the foregoing fields, and particularly in the electronics field, a tantalum sputtering target suitable for forming films of complex shapes or forming circuits is recently in demand.
Generally speaking, this tantalum target is manufactured by performing the forging and annealing (heat treatment) of an ingot or a billet obtained by subjecting a tantalum raw material to electron beam melting and casting, and thereafter performing rolling and finish processing (machining, polishing, etc.) thereto to process into a target. In this kind of production process, the cast structure of the ingot or billet obtained via melting/casting will be destroyed by being subject to forging and recrystallization annealing, and uniform and fine crystal grains are consequently obtained.
When performing sputtering, as the crystal grains of the target are finer and more uniform, more uniform deposition is enabled and a film with stable characteristics can be obtained. Furthermore, it is also effective to align the crystal orientation across the thickness direction of the entire target to improve the uniformity of deposition. Note that the following background art are known in relation to a tantalum sputtering target (Patent Documents 1 to 11).
In recent years, high-power sputtering by magnetron sputtering equipment is being performed to increase the deposition rate of sputtering. Meanwhile, the wiring width of semiconductor integrated circuits becomes even more refined, but with high-power sputtering, there is a problem in that the uniformity of the film thickness cannot be controlled because the deposition rate is too high to form a uniform film in a leading-edge micro wiring pattern. In particular, this problem is notable when forming an ultra-thin film on wiring holes having a large aspect ratio.